Master Thesis: Analog design of a high-speed, energy efficient, Analog-to-Digital converter
NXP Semiconductors N.V. enables secure connections for a smarter world, advancing solutions that make lives easier, better, and safer. As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the automotive, industrial & IoT, mobile, and communication infrastructure markets. Built on more than 60 years of combined experience and expertise, the company has approximately 30,000 employees in more than 30 countries and posted revenue of $9.41 billion in 2018.
Advances in the CMOS technology allow the integration of large digital systems with increased density and performance. However, analog components do note shrink that much in the same process, they have the physical property even to increase slightly. Similarly, at the same time, the “digital-trend” drives innovation towards all-digital receiver architectures. The scope of this thesis is to develop a high-speed, energy efficient, Analog-to-Digital (ADC) converter in CMOS technology tailored to an all-digital receiver architecture.
For the successful completion of the Master Thesis you will receive a remuneration of a one-time payment of EUR 5.150, - gross. Additional you will get a bonus of EUR 2.000, - gross if you receive an excellent grade “Sehr gut” for your Thesis.
For further questions, please contact our Recruiter Sabine Laemmerer (firstname.lastname@example.org)